1. Field of the Invention
The present invention relates to an insulated gate type transistor (thin film transistor, TFT) formed on an insulating surface of an insulating material such as glass or a silicon wafer having an insulating film of silicon oxide or the like formed thereon and a method for producing the same and, in particular, to a semiconductor device such as an integrated circuit on which a plurality of such TFTs are formed. A TFT of the present invention has an active layer constituted by a crystalline semiconductor such as an amorphous or polycrystalline semiconductor. Although the present invention is effective especially for TFTs formed on a glass substrate having glass transition point (referred to as strain temperature or strain point) of 750.degree. C. or lower, it may be applied to TFTs formed on a glass substrate having a higher melting point or an insulating film formed on a single crystal semiconductor wafer. Semiconductor devices of the present invention may be used for an active matrix type liquid crystal display device or the like, a driving circuit such a an image sensor, or a three-dimensional integrated circuit having many integrated circuit layers.
2. Description of the Related Art
It has been well known that TFTs are formed for driving an active matrix type liquid crystal display device, an image sensor, and the like. For such TFTs, a film-like semiconductor deposited by a vapor phase growing process such as CVD (chemical vapor deposition) and sputtering is used as it is or used after being subjected to an annealing process such as heat annealing and laser annealing. Most semiconductors obtained through such process are in an amorphous or polycrystalline state.
With the advent of devices having long gate lines such as high capacity matrices in recent years, the resistance of such gate lines has created problems such as delay in signals and distortion of pulses. Also, semiconductors used as an active layer (channel forming region) have a problem in that an unwanted channel is formed in an area where no gate electrode is provided (e.g., the bottom side of a top gate type semiconductor and the top side of a bottom gate transistor) because such semiconductors are in a non-single crystalline state, which results in a leakage current. Further, high sheet resistance at the source and drain has become significant especially when an amorphous semiconductor is used.